Charge pump phase locked loop

Details Charge pump phase locked loop Charge pump phase locked loop

2007-01-02

2007-01-02

Ghebretinsae, Temesghen (Department: 2611)

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

C375S374000, C327S157000, C327S148000

Reexamination Certificate

active

10154684

ABSTRACT:
A phase lock loop circuit60has a phase frequency detector62, a charge pump64, an active filter87and a voltage-controlled oscillator100. The phase detector generates UP and DN signals indicative of the relative frequency of FR, a reference signal, and FV, a signal controlled by the voltage-controlled oscillator. A charge pump using logic gates (buffer66and inverter68) to produce a voltage drop over resistors74and84to generate a voltage at a node coupled to the input of transmission gate76according to the values of the UP and DN signals. When the transmission gate76is closed (low impedance) the charge pump may sink or source current to the inverting input of the operational amplifier86of the active filter86. When the transmission gate is open (high impedance state) the inverting input is electrically isolated from the node.

REFERENCES:
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patent: 5315269 (1994-05-01), Fujii
patent: 6223061 (2001-04-01), Dacus et al.
patent: 6963233 (2005-11-01), Puccio et al.
patent: 0 416 840 (1991-03-01), None
patent: 0 855 802 (1998-07-01), None
patent: 5-183431 (1993-07-01), None

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