Charge pump circuit having an improved charge pumping efficiency

Details Charge pump circuit having an improved charge pumping efficiency Charge pump circuit having an improved charge pumping efficiency

1993-04-12

1995-02-28

Yoo, Do Hyun

Static information storage and retrieval

Read/write circuit

Including reference or bias voltage generator

365177, 365204, 327536, 327534, G11C 514

Patent

active

053943651

ABSTRACT:
A charge pump circuit includes a P channel field effect transistor, a diode-connected N channel field effect transistor between a first node and a second node. The P channel field effect transistor operates in response to a first clock signal applied through a first capacitor to discharge the first node to a ground potential. The first node receives a second clock signal through a second capacitor. Negative electric charges are pumped out to the second node. A negative bias voltage is generated from the second node with an improved efficiency and reliability.

REFERENCES:
patent: 5243571 (1993-09-01), Brossord
patent: 5276651 (1994-01-01), Sakamoto
Edited by T. Sugano and published by Baifukam, "Design of CMOS ULSI", published Apr. 25, 1989, pp. 189-190.

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