Charge pump circuit for semiconductor memory device

Details Charge pump circuit for semiconductor memory device Charge pump circuit for semiconductor memory device

2006-02-10

2008-11-25

Richards, N. Drew (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Amplitude control

C327S536000, C327S537000

Reexamination Certificate

active

07456676

ABSTRACT:
A charge pump circuit may include a cross-coupled load unit and a bias determination unit. The cross-coupled load unit may receive first and second input signals applied with mutually opposite phases to obtain a charge pumping. The cross-coupled load unit may have first and second output terminals that may be connected with transistors in a cascade connection structure. The bias determination unit may have a current mirror structure, and independently determine biases of a transistor among the cascade structure connected transistors in response to voltages of the first and second output terminals.

REFERENCES:
patent: 6191623 (2001-02-01), Gabara
patent: 6747494 (2004-06-01), Bushey et al.
patent: 6747506 (2004-06-01), Thiara
patent: 7057421 (2006-06-01), Shi et al.
patent: 7279939 (2007-10-01), Burleson et al.
patent: 2004/0160244 (2004-08-01), Kim
patent: 2006/0049852 (2006-03-01), Park et al.
patent: 2006/0132191 (2006-06-01), Palmer

Affiliated with

Also associated with

Rating

Charge pump circuit for semiconductor memory device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Charge pump circuit for semiconductor memory device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Charge pump circuit for semiconductor memory device will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4050558