Charge pump circuit

Details Charge pump circuit Charge pump circuit

1998-10-01

2000-05-23

Chin, Stephen

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

327148, 327157, 327536, H03D 324

Patent

active

060673362

ABSTRACT:
A charge pump includes a constant current source, a charging field effect transistor (FET) and a discharging FET coupled to mirror a current in the constant current source, a first pair of switching transistors controlling a charging current flow between a charging path and a first standby path, a second pair of switching transistors controlling a discharging current flow between a discharging path and a second standby path, a first and a second pairs of transistors isolating output and input of the charge pump and keeping unchanged the drain voltages of the charging and the discharging FETs. The two pairs of switching transistors in conjunction with the two pairs of transistors act to keep the charging and the discharging currents always on. Accordingly, the switching performance of the disclosed charge pump is much better than prior arts without using current-steering amplifier and is capable of high frequency operation. In addition, charge feedthrough, jitters, and unbalanced output waveform is not going to be significant in the invention. Consequently, the invention provides a device-saving charge pump supplying matched up and down current pulse without charge feedthrough.

REFERENCES:
patent: 5192916 (1993-03-01), Glass
patent: 5285114 (1994-02-01), Atriss et al.
patent: 5473283 (1995-12-01), Luich
patent: 5646563 (1997-07-01), Kuo
patent: 5801578 (1998-09-01), Bereza
Howard C. Yang, Lance K. Lee, and Ramon S. Co, "A Low Jitter 0.3-165 MHz CMOS PLL Frequency Synthesizer for 3 V/5 V Operation" IEEE Jorunal of Solid-State Circuits, vol. 32, No. 4, Apr. 1997.

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