Charge coupled device memory with method of doubled storage capa

Details Charge coupled device memory with method of doubled storage capa Charge coupled device memory with method of doubled storage capa

1976-12-06

1979-02-13

Konick, Bernard

Static information storage and retrieval

Systems using particular element

Semiconductive

365212, G11C 704, G11C 1134, G11C 1928

Patent

active

041399102

ABSTRACT:
A two phase charge coupled device memory array wherein the storage capacity is increased by using multiple levels of charge storage within a given cell. A voltage waveform generator capable of producing one of four different voltages is utilized to input and output charge in the multiple level charge method. In determining the level of charge stored within a given cell in the array, the voltage difference between a reference cell and an adjacent addressing cell is used. By determining the voltage level of the addressing cell at which charge overflows the reference cell and counting the number of times it overflows as the voltage generator is successively stepped through its four voltage levels, the level of the original charge input to a given cell can be determined. To make the multiple level scheme independent of process parameters and temperature, the same two cells are utilized for both input and output functions. Various other cells are provided to block and route charge with respect to the array. The method could be utilized with three phase and four phase systems, if desired.

REFERENCES:
patent: 3772658 (1973-11-01), Sarlo
patent: 3789247 (1974-01-01), Beausoleil et al.
patent: 3891977 (1975-06-01), Amelio et al.
patent: 3930255 (1975-12-01), Means
patent: 3958210 (1976-05-01), Levine
David F. Hoeschele, Jr., Analog to Digital/Digital to Analog Conversion Techniques, pub. Aug. 14/68, pp. 9-10, 358-360, John Wiley & Sons, Inc.

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