Charge-coupled device

Details Charge-coupled device Charge-coupled device

1988-04-28

1989-10-31

Popek, Joseph A.

Static information storage and retrieval

Systems using particular element

Semiconductive

365233, G11C 2700, H01L 2976

Patent

active

048782025

ABSTRACT:
A charge-coupled memory of the SPS type, in which the input of the series input register is coupled so as to be switchable to an n-bit shift register. The data can thus be read in directly or with a certain delay via the shift register. If an uninterrupted flow of bits is supplied, for example video information, a pause, during which no bits appear at the input of the input register, can be obtained by switching on the shift register in the supply of information to the input register, without information being lost. This pause can be utilized to transport information already read in to the parallel section. As a result, a matrix organization can be given to the memory, in which event the dissipation is lower, the transfer losses are smaller and at the same time a gain in surface area is obtained.

REFERENCES:
patent: 4196389 (1980-04-01), Kelly et al.
patent: 4225947 (1980-09-01), Councill et al.

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