Charge breakdown avoidance for MIM elements in SOI base...

Details Charge breakdown avoidance for MIM elements in SOI base... Charge breakdown avoidance for MIM elements in SOI base...

2011-07-12

2011-07-12

Tran, Long K (Department: 2818)

Semiconductor device manufacturing: process

Forming bipolar transistor by formation or alteration of...

Self-aligned

C257S296000, C257S300000, C257S306000, C257S347000, C257S351000, C257S532000, C257SE29182, C257SE29020, C257SE29112, C257SE21339, C257SE21562, C257SE21630, C438S076000, C438S146000, C438S175000, C438S526000

Reexamination Certificate

active

07977200

ABSTRACT:
A semiconductor device including at least one capacitor formed in wiring levels on a silicon-on-insulator (SOI) substrate, wherein the at least one capacitor is coupled to an active layer of the SOI substrate. A method of fabricating a semiconductor structure includes forming an SOI substrate, forming a BOX layer over the SOI substrate, and forming at least one capacitor in wiring levels on the BOX layer, wherein the at least one capacitor is coupled to an active layer of the SOI substrate.

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