Electrical computers and digital data processing systems: input/ – Input/output data processing – Data transfer specifying
Reexamination Certificate
1999-11-10
2003-09-30
Gaffin, Jeffrey (Department: 2182)
Electrical computers and digital data processing systems: input/
Input/output data processing
Data transfer specifying
C710S022000, C710S029000, C710S057000
Reexamination Certificate
active
06629164
ABSTRACT:
TECHNICAL FIELD OF THE INVENTION
The present invention relates generally to the field of telecommunications and, in particular, to flow control in communication circuits.
BACKGROUND
In recent years, computers have become a commonplace part of life for large segments of society. Many businesses and other groups or institutions rely on vast networks of computers to share data among large numbers of users. To communicate with each other, these computers and other network devices generate serial data streams that are communicated over some medium such as a telephone line, local area network or other appropriate medium.
A serial data stream can include data as well as commands that control the communication between end stations. This is referred to as “in-band communication.” These commands are typically transmitted over the same transmission medium as the data and, in fact, look just like regular data. Thus, the end stations must be able to distinguish between two modes of communication: a command mode and a data mode. Data that is not intended as a command but that could be interpreted as a command is typically preceded by a signal indicating that the communication is transitioning between command and data modes.
A receiving end station for the serial data stream includes a serial port card. The serial port card includes a serial controller. The serial controller includes serial ports which are adapted to receiving synchronous and asynchronous protocols. The serial controller stores the serial data in direct memory access (DMA) buffers in cooperation with a direct memory access controller (DMAC). The DMAC is designed to communicate status information about the serial data to processors. Status communicated to the DMAC from the serial controller is referred to as an end of frame (EOF), or status signal. The DMAC takes special actions when it encounters an EOF in the serial data stream. The data associated with the EOF is combined with other status in the DMA controller and stored in the current DMA descriptor and operation resumes with the next DMA descriptor.
Each DMA buffer is associated with a DMA descriptor. When a DMA buffer fills with serial data, the serial data stream rolls into the next DMA buffer which is assigned a next DMA descriptor. With large serial data streams the potential exists to fill a DMA buffer before an EOF. Therefore, every DMA buffer descriptor is not assured of containing status information (e.g., an EOF) that applies to the data in the buffer.
Commands can be used for in-band “flow control” in the serial communication between end stations. In-band flow control relates to controlling the transmission and receipt of data over a serial communication link. In-band flow control is typically used with asynchronous data ports. One command that is typically provided in command mode is the “XOFF” command or its equivalent. This command allows one end station to instruct the other end station to cease transmitting data over the serial communication link. Another command that is typically provided includes the start/resume data transmission command, “XON” command.
The speed and accuracy with which an end station responds to the XOFF, or XON, command provides competing concerns for system designers. For example, some systems respond quickly to anything in the data path that looks like an XOFF command. Unfortunately, this can result in an unwanted interruption in the communication link when data is mistakenly interpreted as an XOFF command. Alternatively, some systems use procedures to assure that data that matches the XOFF command was sent in command mode before responding to the command. At today's ever increasing data rates, this can result in data loss and other problems due to the time delay in processing the data to interpret the command. These speed and accuracy concerns make it important that a command be readily identifiable with a specific buffer descriptor.
Similarly, when specific data needs to be quickly located and processed, it is important that the data can be immediately located in a specific descriptor. Without a status in each buffer descriptor, the search becomes more cumbersome.
For the reasons stated above, and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for improved flow control for a serial communication link. It is desirable that a serial port card generates status information in such a way that it be quickly located and acted upon.
SUMMARY
The above mentioned problems with flow control and other problems are addressed by the present invention and will be understood by reading and studying the following specification. Systems and methods are described which includes character counters and match registers which allow commands and data to be associated with a specific buffer descriptor. In this manner, important commands and data can be more quickly located and processed.
In particular, an illustrative embodiment of the present invention includes a method for controlling commands and data in a serial port card. The method includes programming a character count register with a maximum number of characters that a serial controller will send to a direct memory access controller (DMAC) between an end of frame (EOF) indication, or status signal. Characters in an incoming data stream are counted using the character count register. An EOF signal is passed to the DMAC after the maximum number of characters have been written to a direct memory access (DMA) buffer. The method further includes resetting the character count register any time the serial controller passes an EOF to the DMAC.
In another illustrative embodiment, a method for controlling commands and data in a serial port card includes programming a character into a match register. The method includes monitoring an incoming data stream. Data in the data stream is compared with the character in the match register. When a character in the incoming data stream matches the character programmed in the match register, a match bit is set corresponding to the match register. The method further includes sending the match bit as part of a next end of frame (EOF) indication sent by a serial controller to a direct memory access controller (DMAC).
REFERENCES:
patent: 3845474 (1974-10-01), Lange et al.
patent: 4035777 (1977-07-01), Moreton
patent: 4151592 (1979-04-01), Suzuki et al.
patent: 4774625 (1988-09-01), Yamanaka
patent: 5353338 (1994-10-01), Nakano et al.
patent: 5371858 (1994-12-01), Miller et al.
patent: 5452432 (1995-09-01), Macachor
patent: 5459754 (1995-10-01), Newby et al.
patent: 5497501 (1996-03-01), Kohzono et al.
patent: 5561816 (1996-10-01), Mitsuhira et al.
patent: 5613153 (1997-03-01), Arimilli et al.
patent: 5694575 (1997-12-01), Oba et al.
patent: 5734684 (1998-03-01), Matsui
patent: 5761453 (1998-06-01), Anderson et al.
patent: 5991831 (1999-11-01), Lee et al.
patent: 6029202 (2000-02-01), Frazier et al.
patent: 6058474 (2000-05-01), Baltz et al.
patent: 6105086 (2000-08-01), Doolittle et al.
patent: 6134607 (2000-10-01), Frink
patent: 6298396 (2001-10-01), Loyer et al.
patent: 0563621 (1993-10-01), None
“MC68030 Enhanced 32-Bit Microprocessor User's Manual, 3rd Edition”, Section 6,Published by Motorola(1992).
“PowerPC 601 RISC Microprocessor User's Manual”, Chapter 4; Sections 4.7.2 through 4.7.9,Available from IBM and Motorola.
“TinyRISC TR4101 Building Blocks Technical Manual”, Published by LSI Logic, (Jan. 2000).
“TinyRISC TR4101 Microprocessor Core Technical Manual”, Published by LSI Logic, (Dec. 1999).
Tanenbaum, Andrew, S., “Operating Systems: Design and Implementation”,Section 2.2.3: Mutual Exclusion with Busy Waiting, Prentice-Hall, Inc., Englewood Cliffs, New Jersey, pp. 53-57, (1987).
Davidson Scott A.
Groven Gary A.
Lipe Robert J.
Rabe Jeffrey T.
Rustad Mark D.
Digi International Inc.
Gaffin Jeffrey
Kim Harold
Schwegman Lundberg Woessner & Kluth P.A.
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