Coded data generation or conversion – Digital code to digital code converters – To or from interleaved format
Reexamination Certificate
1999-04-19
2002-08-20
JeanPierre, Peguy (Department: 2819)
Coded data generation or conversion
Digital code to digital code converters
To or from interleaved format
C714S790000, C714S800000, C341S055000
Reexamination Certificate
active
06437714
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to a device and method for communicating data in a unit of frame, and in particular, to a channel encoding device and method.
2. Description of the Related Art
In communication systems for processing voice, character, image and video signals, data is generally transmitted in consecutive frames. Further, in a system for communicating such frame data, a channel encoder for error correction should also encode data in the frame unit. In this case, the channel encoder inserts tail bit at the end of a data frame to reset the convolutional encoder to a known state and to allow the decoder to efficiently decode the frames using that information. An IS-95 system typically uses a non-recursive systemic convolutional encoder, which a sequence of zero(0) bits to the end of each frame by an amount equivalent to the number of taps of a serially time-delayed data sequence to implement the frame termination, because input bits are fed back to the delays.
FIG. 1
is a block diagram of a turbo encoder which is a typical recursive systemic encoder. The turbo encoder encodes an N-bits input frame into parity symbols using two simple constituent encoders, and can have a parallel or serial structure. In addition, the turbo encoder uses recursive systemic convolutional codes as constituent codes.
Shown in
FIG. 1
is a conventional parallel turbo encoder, which is disclosed in U.S. Pat. No. 5,446,747 issued to Berrou, can be reference of this invention. The turbo encoder of
FIG. 1
includes an interleaver
120
interposed between a first constituent encoder
110
and a second constituent encoder
130
. The interleaver
120
has the same size as a frame length, N, of input data bits and changes arrangement of the data bits be input to the second constituent encoder
130
to reduce a correlation among the parity bits.
The first constituent encoder
110
encodes the input data bits and the interleaver
120
interleaves the input data bits according to a specified rule to change arrangement of the data bits. The second constituent encoder
130
encodes an output of the interleaver
120
. The constituent encoder
110
and
130
are equal structures.
FIG. 2
is a diagram illustrating a termination scheme in the recursive systemic convolutional encoder of FIG.
1
. For more detailed information, see D. Divsalar and F. Pollara, “On the Design of Turbo codes”, TDA Progress Report 42-123, Nov. 15, 1995, also can be reference of this invention. Here, one frame data input to the first and second constituent encoders
110
and
130
is assumed to be 20-bit data. In
FIG. 2
, D
1
-D
4
denotes delays and XOR
1
-XOR
6
exclusive OR gates.
Referring to
FIG. 2
, for encoding, a switch SW
1
is ON and a switch SW
2
is OFF. Then, the 20-bit input frame data is applied in sequence to the delays D
1
-D
4
and exclusively ORed by the exclusive gates XOR
1
-XOR
6
, thus outputting encoded bits at the XOR
6
. When the 20 data bits are all encoded in this manner, the switch SW
1
is OFF and the switch SW
2
is ON, for frame termination. Then, the XOR gates XOR
1
-XOR
4
exclusively OR the output data bits of the delays and the corresponding fed-back data bits, respectively, thereby outputting zero bits. The resulting zero bits are again input to the delays D
1
-D
4
in sequence and stored therein. These zero bits input to the delays D
1
-D
4
become tail bits, and the tail bits also are encoded by the constituent encoder then output tail parity bits which are applied to a multiplexer.
The multiplexer multiplexes the encoded data bits and the tail parity bits output from the constituent encoder. The number of the generated tail bits depends on the number of the delays included in the constituent encoders
110
and
130
. The termination scheme of
FIG. 2
generates 4 tail bits per frame and the 4 encoded bits (tail parity bits) for the respective tail bits, undesirably increasing in the number of the final encoded bits, which leads to a decrease in a bit rate. That is, when the coding rate is defined as (the Number of Input Data Bits)/(the Number of Output Data Bits), a turbo code having the structure of
FIG. 1
has a coding rate of (the Number of Input Data Bits)/{(the Number of first constituent encoder Encoded Data Bits+first tail bits+first tial parity bits)+(the Number of second constituent encoder Encoded Data Bits+second Tail parity bits)}. Accordingly, in
FIG. 1
, since the frame data is composed of 20 bits and the number of the delays is 4, the bit rate becomes 20/{(20)+(20+4+4)+(20+4+4)}.
Such a recursive systemic convolutional encoder has a performance depending upon the tailing method, because it is difficult to perfectly tail the turbo codes.
SUMMARY OF THE INVENTION
It is, therefore, an object of the present invention to provide a device and method for performing channel encoding using a frame structure having a termination effect in a recursive systemic encoder for a communication system.
It is another object of the present invention to provide a recursive systemic channel encoding device and method for inserting bits having a specific value in frame data at predefined positions before channel encoding, to attain a termination effect.
It is further another object of the present invention to provide a recursive systemic channel encoding device and method for inserting bits having a specific value at predefined positions of input frame data bits stream before channel encoding, channel encoding input data bits including the inserted bit, puncturing the inserted bits and encoded data bits exceeding a frame length at bit-inserted positions of the input frame data bits stream.
It is still further another object of the present invention to provide a channel encoding device and method for inserting bits having a specific value at predefined positions of frame data to encoding input data bits including the inserted bit, generating encoded symbol and tail parity using a recursive systemic constituent encoder, and puncturing inserted bits to insert the tail parity at the punctured inserted bits positions.
To achieve the above objects, there is provided a channel encoding device. In the channel encoding device, a bit inserter inserts bits having a specific value in data bits at bit positions having a higher error occurrence probability. A constituent encoder encodes an output of the bits inserter. A selector selects an output of the bit inserter and an output of the constituent encoder and outputs the selected value as channel encoded data.
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patent: 5446747 (1995-08-01), Berrou
patent: 5684915 (1997-11-01), Ueda et al.
patent: 5721745 (1998-02-01), Hadlik et al.
patent: 5862153 (1999-01-01), Kikuchi et al.
patent: 5907582 (1999-05-01), Yi
patent: 5978365 (1999-11-01), Yi
patent: 5996104 (1999-11-01), Herzberg
patent: 2001/0009569 (2001-07-01), Kang et al.
patent: 2002/0021763 (2002-02-01), Le Dantec
patent: 10-303801 (1998-11-01), None
patent: 11-508439 (1999-07-01), None
patent: WO97/40582 (1997-10-01), None
Kang Hee-Won
Kim Jae-Yoel
Kong Jun-Jin
No Jong-Seon
Park Chang-Soo
Dilworth & Barrese LLP
Jean-Pierre Peguy
Samsung Electronics Co,. Ltd.
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