Cermet etch technique for integrated circuits

Details Cermet etch technique for integrated circuits Cermet etch technique for integrated circuits

1993-12-07

1994-10-04

Dang, Thi

Adhesive bonding and miscellaneous chemical manufacture

Delaminating processes adapted for specified product

Delaminating in preparation for post processing recycling step

1566591, 156667, 437228, 252 793, B05D 500

Patent

active

053523318

ABSTRACT:
An etching process for patterning thin film cermet (14) on a semiconductor substrate (10) using a mild, room temperature acid solution as the etchant. The semiconductor substrate (10) has a glass passivating layer (12) , such as silicon dioxide, deposited thereon. The cermet layer (14) is deposited on the silicon dioxide layer (12). A photoresist layer (16) is deposited and patterned on the cermet layer (14) followed by the deposition of a layer of aluminum (18) . The cermet (14) is then preferentially etched with a mild, room temperature hydrofluoric acid solution, diluted with hydrochloric acid, to form the desired cermet resistance pattern.

REFERENCES:
patent: 4081315 (1978-03-01), Templin
patent: 5152869 (1992-10-01), Ferraris et al.

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