Optical waveguides – With optical coupler – Particular coupling structure
Reexamination Certificate
2001-11-02
2003-06-03
Palmer, Phan T. H. (Department: 2874)
Optical waveguides
With optical coupler
Particular coupling structure
C385S088000, C385S089000, C385S092000, C385S093000
Reexamination Certificate
active
06574399
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to waferboards that may be utilized to integrate optical, optoelectronic and/or electronic components.
2. Technical Background
“Silicon Waferboard Technology (SWT)” has been widely used as “Silicon Optical Bench (SiOB)” for hybrid integration of optoelectronic, electronic, and optical components. Mechanical alignment features or vision alignment marks fabricated on the surface of a silicon chip in SWT have been used to passively align the active area of Lasers or Detectors with the core of optical fibers in units such as receiver and transmitter modules.
SWT is a hybrid integration of optoelectronic devices including laser arrays, detector arrays, laser driver circuits, and single-mode optical fibers for making low cost fiber optical and optoelectronic products. SWT presently includes vision passive alignment and mechanical passive alignment methods. Both technologies use V-grooves etched in silicon wafers to precisely position the single-mode optical fibers. The vision alignment method (see, e.g. K. Kurata et al., “A Surface Mount Type Single-Mode Laser Module Using Passive Alignment”, Proceeding of 45
th
ECTC conference, 1995, pp. 759) uses two alignment marks patterned on the laser diode (LD) bottom face and on the silicon surface of the waferboard to achieve the passive alignment. The mechanical passive alignment method uses mechanical alignment features fabricated on the LD bonding side and on the surface of a silicon substrate to achieve the passive alignment. (see, e.g., C.A. Armiento et al., “Hybrid optoelectronic integration of transmitter arrays on silicon waferboard”, Proceeding of SPIE, Sep. 3-4 1991, Boston, Mass., pp. 112.)
In general, passive alignment reduces the process cost compared to active alignment. Active alignment requires that the devices be operated during assembly, which may be difficult and expensive to do.
However, present SWT may suffer from various drawbacks. One potential problem involves V-groove etching. Silicon V-groove structures have been broadly used for the placement of optical fibers. The positioning accuracy of optical fibers is determined by V-groove structures formed on the silicon substrate. These V-grooves are fabricated by anisotropic etching of Si using etchants such as KOH solutions. During such etching in silicon, the {111} planes are attacked at a much slower rate than the other crystallographic planes in the anisotropic etchants. When a masked opening along the [110] crystal orientation of the (100) silicon wafers is etched in anisotropic etchant, V-shaped groove or truncated V-grooves will be formed after a certain time of etching. The beveled sides of V-grooves are {111} crystallographic planes having the lowest etch rates. Typically, the etching rate ratio between (100) and (111) planes is in the range of 40-200 depending on the etching conditions. For single mode passive alignment applications, the total positioning tolerance between laser diode chip and an optical fiber is controlled within a 1 &mgr;m or smaller range. The lateral positions (x, y) of V-groove are normally defined by photolithography, and can reach sub-micron alignment accuracy if the V-groove structures are formed along [110] crystal direction of the silicon substrates. The vertical position of fiber inside the V-groove is determined by the V-groove width. Therefore, the alignment of the V-groove opening along with [110] crystal direction and the control of V-groove width are extremely critical for single mode fiber applications.
Although accuracy is critical, accurate alignment of the V-groove opening along the [110] crystal direction may be difficult. Known processes produce silicon wafers with a certain deviation in wafer orientation and in the primary flat direction. The single crystal orientation cuts along the (100) crystal plane with an accuracy of ±0.5°-1.0°. The primary flat cuts along the [110] crystal direction with an accuracy of ±0.5°-1.0°. The misalignment of the V-groove opening will cause the shifting of the center axis of the V-groove and the excess undercut of V-groove. A pre-alignment method can partially solve the problem caused by the primary flat not being along {110} crystal direction, but there is presently no known way to solve the problem caused by the wafer orientation deviation. Thus, the V-groove etching process is presently limited to a manual mode, wherein each wafer is individually custom etched and measured limiting the potential for mass production of such wafers.
Another potential problem associated with existing SWT may occur during high frequency operation of a silicon waferboard. The increasing demand for bandwidth and data throughput of optoelectronic modules leads to increasing the operating frequency of modules, such as 10 Gb/s for OC192 modules and 40 Gb/s for OC768 modules. However, silicon is a high loss substrate material for microwave transmission. The optimized value of microwave transmission loss in SiOB obtained is about−3 db/cm at 40 GHz. The impedance of coplanar waveguide (CPW) on SiOB varies with the operation frequency, which is caused by the effect of interface states. The impedance of the CPW is not fixed as designed with the operation frequency, so the reflection intensity of the microwave signal will change too. The relatively long process cycle of existing SWT processing may present additional problems. Furthermore, the processing steps of typical silicon waferboard products are quite complicated. Processing may include 8-9 mask levels and more than 39 steps. The complexity of the silicon waferboard process results in relatively low process yield and relatively high fabrication costs.
SUMMARY OF THE INVENTION
One aspect of the present invention involves forming a silicon waferboard having mechanical passive alignment features. A mold is then made from the silicon waferboard via electron forming. Green (unsintered) ceramic tape is formed in the mold and then sintered to form a ceramic waferboard having substantially the same mechanical passive alignment features as the silicon waferboard utilized to make the mold.
Another aspect of the present invention is an optoelectronic module including a ceramic waferboard having a groove configured to passively position an optical fiber. The ceramic waferboard includes an alignment feature configured to passively position an optical component. An optical device is secured to the ceramic waferboard in contact with the alignment feature to thereby position the optical device. An optical fiber is positioned in the groove with an end of the optical fiber positioned adjacent the optical device to thereby optically couple the optical fiber to the optical device. The optoelectronic module also includes an integrated circuit chip secured to the ceramic waferboard, and a conductive material is disposed on the ceramic waferboard and electrically couples the integrated circuit chip to the optical device.
Another aspect of the present invention is a method of making a ceramic waferboard, including providing a silicon waferboard having a surface with at least one passive alignment structure. A mold is made from the silicon waferboard such that a portion of the mold is configured to reproduce the alignment structure. Unsintered ceramic material is engaged with the mold such that a portion of the unsintered material has a shape that is substantially the same as the alignment structure of the silicon waferboard. The ceramic material is sintered to form a ceramic waferboard.
Yet another aspect of the present invention is a method of fabricating an optical module, including providing a silicon waferboard having a surface with at least one passive alignment element. A mold is made from the silicon waferboard such that a portion of the mold is configured to reproduce the alignment element. Unsintered ceramic material is brought into engagement with the mold such that a portion of the unsintered c
Boudreau Robert A.
Tan Songsheng
Agon Juliana
Corning Incorporated
Palmer Phan T. H.
Price Heneveld Cooper DeWitt & Litton
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