Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Insulating material
Reexamination Certificate
2001-06-13
2003-09-30
Williams, Alexander O. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Insulating material
C257S707000, C257S703000, C257S680000, C257S774000, C257S797000, C257S705000, C257S729000, C257S706000, C257S710000, C428S076000
Reexamination Certificate
active
06627987
ABSTRACT:
BACKGROUND
1. Field of the Invention
The present invention relates to semiconductor packaging, and more particularly to a ceramic semiconductor package and a method for fabricating such a package.
2. Description of the Related Art
Ceramic semiconductor packages, such as Ceramic Ball Grid Array (“CBGA”)/Ceramic Land Grid Array (“CLGA”) packages, typically use a cofired alumina ceramic substrate to support a semiconductor chip and possibly other electronic devices. The ceramic substrate is fabricated by screening refractory metal paste into traces and vias on and through alumina-based green sheets. The various green sheets are laminated together and sintered at high temperatures. Once sintered, the portions of the traces may be plated with nickel and gold. Subsequently, the semiconductor die is attached to the ceramic substrate and is electronically connected to the traces. Finally, a lid or some sort of an encapsulant encloses the die. Often, the die is located in a cavity of the substrate and covered with a metal lid.
Conventional methods of sealing the cavity of such ceramic substrate packages may cause unacceptable amounts of solder to enter into the cavity, which may interfere with the semiconductor components disposed therein.
A need exists, therefore, for a sealed hermetic ceramic semiconductor package that does not allow unacceptable amounts of solder to enter the cavity during the soldering process.
SUMMARY OF THE INVENTION
A sealed ceramic semiconductor package is provided that includes a ceramic substrate having planar top and bottom surfaces with a cavity open at a substrate top surface. A semiconductor die is disposed within the cavity and is electrically coupled through the substrate to input/output terminals disposed adjacent the substrate bottom surface. A metal film is disposed on a major portion of the planar substrate top surface and around the cavity and a flat metal lid is positioned over the cavity and metal film. A layer of solder is disposed between, coextensive with, and connecting all juxtaposed regions of the metal lid and the metal film to permit sealing of the cavity by soldering the metal lid to the metal film with the layer of solder.
In one embodiment, a sealed ceramic semiconductor package may be fabricated by initially providing a ceramic substrate having opposing planar top and bottom surfaces, a plurality of cavities each having an opening at the substrate top surface, and a metal film disposed over the substrate top surface surrounding the cavity. Next, a semiconductor die may be mounted in each of the cavities and electrically coupled through the substrate to input/output terminals of the substrate. A metal lid panel having a layer of solder disposed over a surface thereof is placed over the substrate top surface so as to cover the cavities and juxtapose the solder layer with the metal film. The lid panel is then soldered to the metal film by melting the layer of solder. Lastly, a plurality of packages may be singulated by severing the ceramic substrate and the lid panel.
Accordingly, the present ceramic semiconductor package and method of fabricating the same provide a sealed ceramic semiconductor package that may be fabricated with little, if any, solder entering the cavity of the package during the soldering process. These and other aspects, features, and capabilities will be clear from of the following detailed description and the accompanying drawings.
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Glenn Thomas P.
Hollaway Roy D.
Webster Steven
Amkor Technology Inc.
Bever Hoffman & Harms LLP
Parsons, Esq. James E.
Williams Alexander O.
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