Electrical computers and digital processing systems: support – Digital data processing system initialization or configuration – Loading initialization program
Reexamination Certificate
1999-12-06
2002-10-29
Heckler, Thomas M. (Department: 2185)
Electrical computers and digital processing systems: support
Digital data processing system initialization or configuration
Loading initialization program
C709S222000
Reexamination Certificate
active
06473857
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to the field of mass storage systems. In particular, the invention relates to the boot load management of input-output processors and other cards populating a file server for a mass storage system.
2. Description of the Related Art
The storage of large amounts of data in so-called mass storage systems is becoming a common practice. Mass storage systems typically include storage devices coupled to file servers on data networks. As the amount of storage has increased, the number of file servers in networks has grown, and the concept of a storage area network (SAN) has arisen. Storage area networks connect a number of mass storage systems in a communication network which is optimized for storage transactions. The file servers that manage SANs control many storage devices.
Numerous users in a network communicate with the file servers in a mass storage system for access to data. They depend on nearly continuous access to data, excepting scheduled interruptions. Techniques for managing startup of file servers which utilize redundant controllers and storage devices and techniques for monitoring the operational status of file server components have become increasingly important. These techniques contribute to reliable access to data without unscheduled interruption of user access.
SUMMARY OF THE INVENTION
The present invention provides a method for centralized and managed loading of boot images into one or more processors that are part of a file server for a mass storage system.
In one embodiment, the present invention provides a method for booting processors in a computer system, the computer system including at least one first controller, at least one input output processor (IOP), a first bus and a second bus, including the steps of: detecting in the first controller readiness of the IOP to load a boot image; identifying across the first bus a location at which the boot image will be loaded; and loading the boot image across the second bus. It may additionally provide the steps of powering on the IOP, determining which of a plurality of boot images should be identified to the IOP, and booting the IOP from the boot image. One aspect of the invention may be that the detecting step includes signaling by the IOP across the first bus that it is ready to boot. Alternatively, the detecting step may include detecting that a flag has been set in the first controller's memory. The location at which the boot image will be loaded is memory on the IOP and either the IOP or the first controller may carry out the loading step by copying the boot image into the IOP's memory.
In another embodiment, the present invention provides a method for booting processors in a computer system, the computer system including at least one first controller, at least one IOP, a first bus and a second bus, the first controller and the IOP having a first processor coupled to the first bus and a second processor coupled to both the first processor and the second bus, including the steps of: signaling from the IOP's first processor to the first controller's first processor that the IOP's second processor is ready to boot; identifying from the first controller's first processor to the IOP's first processor a location at which the IOP's second processor can access a boot image; and accessing from the IOP's second processor the boot image. This embodiment may additionally provide some or all of the steps of directing the IOP's first processor to power on the IOP's second processor, determining which of a plurality of boot images should be identified by location to the IOP or its first processor, acknowledging by the receipt by the IOP's first and/or second processor of the location of the boot image; and directing the IOP's second processor, via the IOP's first processor, to access the boot image. As above, one aspect of the invention may be that the location at which the boot image can be accessed is memory on the IOP and either the IOP or the first controller may carry out the accessing step by copying the boot image across the second bus into the IOP's memory. In particular, the location may be memory of the IOP's second processor.
An alternative embodiment of the present invention is a method for booting processors in a computer system, the computer system including at least one first controller, at least one input output processor (IOP), a first bus and a second bus, including the steps of: detecting in the first controller readiness of the IOP to load a boot image; identifying across the first bus a location at which the IOP can access the boot image; and accessing across the second bus the boot image. As above, this embodiment may additionally provide the steps of powering on the IOP, determining which of a plurality of boot images should be identified to the IOP, and booting the IOP from the boot image. Aspects of the detecting step, the boot image location and the loading step may be as summarized above.
A further embodiment of the present invention is a method for booting processors in a computer system, the computer system including at least one first controller, at least one input output processor (IOP), a first bus and a second bus, the first controller and the IOP having a first processor coupled to the first bus and a second processor coupled to both the first processor and the second bus, including the steps of: signaling from the IOP's first processor to the first controller's first processor that the IOP's first and/or second processor is ready to boot; identifying from the first controller's first processor to the IOP's first processor a location at which the IOP's second processor can access a boot image; and accessing from the IOP's second processor the boot image. As in a prior embodiment, this embodiment may additionally provide some or all of the steps of directing the IOP's first processor to power on the IOP's second processor, determining which of a plurality of boot images should be identified by location to the IOP or its first processor, acknowledging by the IOP's first and/or second processor receipt of the location of the boot image; and directing the IOP's second processor, via the IOP's first processor, to access the boot image. As above, one aspect of the invention may be that the location at which the boot image can be accessed is memory on the IOP and either the IOP or the first controller may carry out the accessing step by copying the boot image across the second bus into the IOP's memory. In particular, the location may be memory of the IOP's second processor.
The present invention provides the advantages of centralized boot management. Only one boot image needs to be updated. When each IOP is booted, it is assured of having the most current version of the boot image. The boot image supplied may be selected from a plurality of boot images adapted to normal, diagnostic, crash dump or other purposes. The progress of IOP booting is tracked and monitored.
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Panas Michael G.
Taylor Alastair L.
Dell Products L.P.
Hamilton & Terrile LLP
Heckler Thomas M.
Terrile Stephen A.
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