Cell leakage monitoring circuit and monitoring method

Details Cell leakage monitoring circuit and monitoring method Cell leakage monitoring circuit and monitoring method

2006-01-31

2006-01-31

Hoang, Huan (Department: 2827)

Static information storage and retrieval

Read/write circuit

Data refresh

C365S189070, C365S194000

Reexamination Certificate

active

06992942

ABSTRACT:
A cell leakage monitor includes a circuit for comparing the node voltage of a pseudo-cell equivalent to a memory cell of a DRAM to a reference value to output a refresh signal OSC when the node voltage of the pseudo cell has decreased to a reference value. As the leakage current, the GIDL (gate insulated drain leakage current) of a p-channel MOSFET is used. The cell leakage monitor also includes a circuit for selectively setting the gate voltage of the MOSFET of the leakage source and a circuit for selecting the capacitance value of the capacitor connected to the node voltage.

REFERENCES:
patent: 5652729 (1997-07-01), Iwata et al.
patent: 6141278 (2000-10-01), Nagase
patent: 10-289573 (1998-10-01), None
patent: 2002-56671 (2002-02-01), None
patent: 2002-110944 (2002-04-01), None
patent: 2003-77273 (2003-03-01), None

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