Cell forming part of a customizable logic array

Electronic digital logic circuitry – Multifunctional or programmable – Array

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326 82, H03K 738, H03K 190175

Patent

active

056844123

ABSTRACT:
A cell forming part of a customizable logic array and including at least first and second different multiplexers, an output of the first multiplexer being connected to an input of the second multiplexer.

REFERENCES:
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patent: 5341041 (1994-08-01), Gamal
patent: 5391943 (1995-02-01), Mahant-Shetti et al.
patent: 5430390 (1995-07-01), Chan et al.
patent: 5436574 (1995-07-01), Veenstra
patent: 5451887 (1995-09-01), El-Avat et al.
R.J. Landers, S.s. Mahant-Shetti and C. Lemonds, A Multiplexer-Based Architecture for High Density, Low Power Gate Arrays, IEEE Journal of Solid-State Circuits, vol. 30, No. 4, Apr. 1995, pp. 392-396.
G. Robinson, TI Develops Dense Gate-Array Architecture, Electronic Engineering Times, Sep. 25, 1995, p. 42.
Maxfield, C., Delay effect rule in deep-submicron Ics, Electronic Design, Jun. 1995, pp. 109-102.

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