Cell array block of FeRAM, and FeRAM using cell array

Static information storage and retrieval – Systems using particular element – Ferroelectric

Reexamination Certificate

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C365S063000, C365S149000

Reexamination Certificate

active

06867998

ABSTRACT:
The present invention discloses a cell array block of a ferroelectric random access memory (FeRAM) and an FeRAM using the same. In the multi-bit line structure cell array block of the FeRAM having a sub bit line and a main bit line, and including a plurality of sub cell arrays for inducing a sensing voltage of the main bit line by converting a sensing voltage of the sub bit line into current, in order to overcome different data properties of the whole sub cell arrays due to delay time differences by positions of the sub cell arrays, a different size of sensing loads are selectively transmitted to the main bit line according to the positions of the operated sub cell arrays, or a different size of ferroelectric capacitors are used in a memory cell according to the positions of the sub cell arrays. As a result, the cell data properties of the whole cell array block are equalized for even distribution.

REFERENCES:
patent: 5682343 (1997-10-01), Tomishima et al.
patent: 5886943 (1999-03-01), Sekiguchi et al.
patent: 6314029 (2001-11-01), Ko et al.
patent: 1019980014400 (2000-07-01), None

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