Cell array and sense amplifier structure exhibiting improved noi

Static information storage and retrieval – Read/write circuit – Noise suppression

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365207, G11C 702

Patent

active

060026251

ABSTRACT:
An improved cell array and sense amplifier structure and embodied method are disclosed. The structure exhibits an improved noise characteristic by decreasing a coupling noise which occurs between bit lines by using, as a reference bit line, a bit line from an array of memory cells other than the array to which the bit line belongs, thus forming a predetermined spacing between a bit line and a reference bit line. The structure includes: an upper sense amplifier having an input terminal commonly connected with a first pair of bit lines of an adjacent first cell array and another input terminal commonly connected with a first pair of bit lines of a non-adjacent second cell array; and a lower sense amplifier having an input terminal commonly connected with a second pair of bit lines of the second cell array and another input terminal connected with a second pair of bit lines of the first cell array.

REFERENCES:
patent: 5134588 (1992-07-01), Kubota et al.
patent: 5418750 (1995-05-01), Shiratake et al.
patent: 5586078 (1996-12-01), Takase et al.
patent: 5732010 (1998-03-01), Takashima et al.

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