CDM ESD event simulation and remediation thereof in...

Details CDM ESD event simulation and remediation thereof in... CDM ESD event simulation and remediation thereof in...

2006-02-07

2008-11-25

Chiang, Jack (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000

Reexamination Certificate

active

07458044

ABSTRACT:
Methods and structure for improved simulation of CDM ESD events and for remediation of circuit designs correcting for previously inexplicable damage to core circuits of an application circuit design caused by such events. Features and aspects hereof note that such previously inexplicable damage to core circuits of an application circuit design is caused by inductive coupling between the non-core circuits and the core circuits of an application circuit design. Improved simulation techniques in accordance with features and aspects hereof may predict where such inductive coupling may cause damage to core circuits. Other features and aspects hereof may alter an application circuit design to provide remediation by automated insertion of additional buffer circuitry to core traces of the core circuitry that may be impacted by such inductive coupling.

REFERENCES:
patent: 6934924 (2005-08-01), Paul et al.
patent: 7020857 (2006-03-01), Singh et al.
patent: 7302378 (2007-11-01), Hayashi
patent: 2004/0098684 (2004-05-01), Amekawa
patent: 2004/0153985 (2004-08-01), Paul et al.
patent: 2004/0243949 (2004-12-01), Wang et al.
patent: 2006/0075368 (2006-04-01), Bakir et al.
patent: 2007/0277138 (2007-11-01), Lai et al.

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