Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-02-07
2009-02-17
Whitmore, Stacy A (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000
Reexamination Certificate
active
07493576
ABSTRACT:
Methods and structure for improved design remediation for previously inexplicable damage to core circuits of an application circuit design caused by CDM ESD events. Features and aspects hereof note that such previously inexplicable damage to core circuits of an application circuit design is caused by inductive coupling between the non-core circuits and the core circuits of an application circuit design. Features and aspects hereof automatically alter an application circuit design to provide remediation by various techniques to reduce the magnitude of such inductive coupling and to thereby reduce susceptibility of the application circuit to damage from CDM ESD events. The modifications may be enforced as rules during initial design of the application circuit or as reconfiguration of a design in response to simulation to discover inappropriate coupling in the design.
REFERENCES:
patent: 2004/0098684 (2004-05-01), Amekawa
patent: 2006/0075368 (2006-04-01), Bakir et al.
M. Etherton, et al; Verification of CDM Circuit Stimulation Using an ESD Evaluation Circuit.
Ito Choshu
Loh William
Ooi Li Lynn
Dimyan Magid Y
Duft Bornsen & Fishman
LSI Corporation
Whitmore Stacy A
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