CCD floating-element output stages providing low reset noise wit

Details CCD floating-element output stages providing low reset noise wit CCD floating-element output stages providing low reset noise wit

1985-12-30

1986-08-26

Rubinson, Gene Z.

Facsimile and static presentation processing

Facsimile

Recording apparatus

329 50, H04N 534

Patent

active

046086064

ABSTRACT:
The output signal from the CCD output register of a semiconductor imager having a floating-gate or floating-diffusion type of output stage is applied to a differentiation circuit. The response of the differentiator circuit to the introduction of charge under the floating element is synchronously detected at output register clock rate to obtain video samples with low reset noise. This is a single sampling process, which avoids the double sampling required in correlated double sampling to reduce reset noise, and which can provide for horizontal peaking.

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patent: 4470676 (1984-09-01), Kinoshita et al.
patent: 4496982 (1985-01-01), Levine
patent: 4511804 (1985-04-01), Ozawa
patent: 4514765 (1985-04-01), Miyata et al.

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