Cascadable current-mode regulator

Details Cascadable current-mode regulator Cascadable current-mode regulator

2006-06-13

2006-06-13

Patel, Rajnikant B. (Department: 2838)

Electricity: power supply or regulation systems

Output level responsive

Using a three or more terminal semiconductive device as the...

C323S271000

Reexamination Certificate

active

07061215

ABSTRACT:
A cascadable power regulator including a programmable delay unit and PWM control logic. The programmable delay unit initiates a delay period in response to a digital input signal and asserts a digital output signal upon expiration of the delay period. The PWM control logic controls a PWM cycle in response to the digital input signal and in response to an output control condition. The cascadable regulator uses digital signals to communicate between channels. Digital signals are not prone to the same kind of signal degradation or noise susceptibility as analog signals. Thus, the number of phases is not limited, the physical separation between the regulators is not limited, and the switching frequency is not as limited. There is no clock signal from a separate controller so that the controller is a relatively simple, low-cost device. Since there is no clock, a unique self-oscillating system is achieved using the cascadable regulator.

REFERENCES:
patent: 5028824 (1991-07-01), Young
patent: 5973485 (1999-10-01), Kates et al.
patent: 5982160 (1999-11-01), Walters et al.
patent: 6292378 (2001-09-01), Brooks et al.
patent: 6396250 (2002-05-01), Bridge

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