Carrier based IC packaging arrangement

Details Carrier based IC packaging arrangement Carrier based IC packaging arrangement

1996-02-02

1997-06-10

Crane, Sara W.

Active solid-state devices (e.g., transistors, solid-state diode

Lead frame

On insulating carrier other than a printed circuit board

257701, 257685, 257723, 257787, H01L 23495

Patent

active

056379161

ABSTRACT:
The present invention discloses the use of a dielectric substrate panel suitable for supporting a plurality of independently packaged ICs. The substrate panel has a plurality of conductive landings arranged on its top surface, a plurality of conductive contacts arranged on its bottom surface and a multiplicity of electrically conductive vias. The vias pass through the substrate panel and are arranged to interconnect selected landings with their associated conductive contacts. The top surface of the substrate panel also includes a number of die attach areas. During packaging, dies are secured to their associated die attach areas on the substrate panel and electrically coupled to appropriate conductive landings. An encapsulant is then formed over each of the dies for protection.

REFERENCES:
patent: 5293067 (1994-03-01), Thompson et al.
patent: 5355016 (1994-10-01), Swirbel et al.
Howard Markstein, "Thermal Enhancements For TQFPs," Electronic Packaging & Production, Silicon Systems, Tustin, California.

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