CardBus interface circuit, and a CardBus PC having the same

Details CardBus interface circuit, and a CardBus PC having the same CardBus interface circuit, and a CardBus PC having the same

1998-02-27

2001-07-03

Dharia, Rupal (Department: 2181)

Electrical computers and digital data processing systems: input/

Intrasystem connection

System configuring

C710S100000, C710S108000, C710S108000, C710S108000, C710S120000, C710S120000

Reexamination Certificate

active

06256692

ABSTRACT:

BACKGROUND TO THE INVENTION
1. Field of the Invention
The present invention relates to a PC Card applied to a CardBus which is used under PCI bus architecture. It relates in particular to an interface circuit for use where a device complying with a PCI bus connects to a CardBus, and to a PC Card having this which is capable of being connected to a CardBus.
2. Description of the Related Art
PCI (Peripheral Component Interconnect) buses are high-speed buses standardized as local buses for use in personal computers, and offering operational stability and extendability together with abundant bus and system control functions. PCI buses are 32-bit wide buses synchronised with a 33 MHz clock, and are capable of achieving transfer speeds up to a maximum of 133 Mbyte/sec. To these PCI buses, PCI cards with SCSI controllers, graphic accelerators and other PCI devices can be connected directly via a PCI connector.
Meanwhile, there are also CardBuses, which have been standardized with a view achieving the same functions as a PCI bus by means of a PC Card. 16-bit PC Cards have been available for fitting to 16-bit ISA buses, and CardBuses has been standardized so as to enable PC Card with business card size to be fitted to PCI buses. Thus, PC Cards for use in CardBuses, i.e. 32-bit PC Cards, are connected to the PCI bus via a PCI-CardBus bridge within the CardBus below the bridge.
PC Cards for use in CardBuses, ie 32-bit PC Cards (hereinafter for the sake of simplicity referred to as ‘CardBus PC Cards’), offer the same facilities for SCSI controllers, graphic accelerators and other devices as the PCI devices. The only difference is that CardBus PC Cards are configured as cards of business-card size rather than for fitting on to a printed substrate as with PCI devices.
However, the above-mentioned CardBuses differ from PCI buses in two respects. Firstly, while the power supply for CardBuses is restricted to 3.3 V, PCI buses are compatible with both 3.3 V and 5 V. Secondly, CardBuses make use of card attribute data known as CIS (Card Information Structure) in order to assign their resources. This CIS constitutes the PC Card attribute data which needs to be communicated to the system side when the CardBus PC Card is inserted. Thus, in the case of a CardBus PC Card complying with a CardBus, a CIS pointer register showing the memory area where the CIS is stored is provided within the configuration space thereof. It may be added that in the example to which the present aspect pertains, as will be explained later, the configuration space is a memory area having a plurality of configuration registers.
Meanwhile, in case of a PCI device connected to a PCI card via a PCI connector, configuration space is provided in the same manner and a CIS pointer register as above is prescribed as an option register, but hardly any PCI devices have one packaged.
As has been mentioned above, an SCSI controller, graphic accelerator and other facilities are packaged with a PC Card as PCI devices (LSIs with PCI interface), which can be connected to the PCI bus via a PCI connector. Further, the above SCSI controller, etc. are integrated within the PC Card as an LSI and connected to the CardBus via a CardBus connector. Thus, while the function is the same, one complies with a PCI bus while the other complies with a CardBus. The above two points constitute the principal differences, but a PCI device complying with a PCI bus can not be used by being mounted on PC Card without modification.
It is an object of the present invention to provide an interface circuit which allows a PCI device to be used as an LSI mounted within a CardBus PC Card.
It is a further object of the present invention to provide a PC Card with an interface circuit of this type.
SUMMARY OF THE INVENTION
With a view to achieving the above-mentioned object, the present invention is a CardBus PC Card complying with a CardBus and having a CardBus connector, comprising:
a device complying with a PCI bus, having a predetermined function and having a first configuration space which complies with the PCI bus; and
an interface circuit located between said device complying with the PCI bus and said CardBus connector, and having a second configuration space which complies with said CardBus,
wherein said first and second configuration spaces constitute a configuration space which complies with a CardBus.
The above-mentioned present invention makes it possible to constitute a PC Card complying with a CardBus and having the configuration space which is required for a CardBus.
With a view to achieving the above-mentioned object, the present invention is further a CardBus PC Card as described above, characterized in that the interface circuit monitors the status of the CardBus which is connectable to the CardBus connector, and when the second configuration space is accessed, halts the transfer of signals from the CardBus to the device complying with the PCI bus, and sends back data from the second configuration space, while on the other hand transferring signals at the CardBus to the device complying with the PCI bus when anywhere other than the second configuration space is accessed.
In this configuration the interface circuit allows a general-purpose inexpensive PCI device to be used as a device for a CardBus PC Card.
With a view to achieving the above-mentioned object, the present invention is a CardBus PC Card complying with a CardBus and having a CardBus connector, comprising:
a device complying with a PCI bus, having a predetermined function and having a first configuration space which complies with the PCI bus; and
an interface circuit located between said device complying with the PCI bus and said CardBus connector, and having a second configuration space which complies with said CardBus, said first and second configuration spaces constituting a configuration space which complies with said CardBus,
said interface circuit having a control circuit which monitors the state of said CardBus and when detecting that somewhere other than said second configuration space has been accessed in accordance with a signal from said CardBus received with a first clock timing, transfers the signal from said CardBus to said device complying with the PCI bus with a second clock timing having a delay of at least one clock in comparison with said first clock timing, while on the other hand when detecting that said second configuration space has been accessed, instead of transferring the signal from said CardBus to said device complying with the PCI bus, outputs data from said second configuration space to said CardBus.
The above configuration ensures that there is ample time for the interface circuit to decode the commands and addresses which are fed to the CardBus connector, and to determine whether or not the integrated configuration space is being accessed. Thus the transferring of CardBus signals to the PCI device can reliably be prevented when the integrated register is being accessed.
With a view to achieving the above-mentioned object, the present invention is a CardBus PC Card complying with a CardBus and having a CardBus connector, comprising:
a device complying with a PCI bus, having a predetermined function and having a first configuration space which complies with a PCI bus; and
an interface circuit located between said device complying with the PCI bus and said CardBus connector, and having a second configuration space which complies with said CardBus, said first and second configuration spaces constituting a configuration space which complies with said CardBus,
said interface circuit having a control circuit which monitors the state of said CardBus and when it detecting that somewhere other than said second configuration space has been accessed in accordance with a signal from said CardBus transmitted with a first clock timing, transfers the signal from said CardBus to said device complying with the PCI bus with a second clock timing having a delay of at least one clock in comparison with said first clock timing, while on the other hand when detecting that said second

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