Capping processor utilization

Details Capping processor utilization Capping processor utilization

2006-11-28

2006-11-28

An, Meng-Ai T. (Department: 2195)

Electrical computers and digital processing systems: virtual mac

Task management or control

Process scheduling

C718S103000, C718S104000

Reexamination Certificate

active

07143411

ABSTRACT:
An apparatus, system, and method allow for capping processor utilization in a computer system. The processors are typically central processing units (CPUs) under control of a system scheduler. The system scheduler controls which of the CPUs will run specific processes. The processes may run according to a predefined priority assigned to each of the processors. A processor bandwidth waster includes a software routine that operates as an infinite loop in one or more of the CPUs. The bandwidth waster may have the highest priority of any process in the computer system such that the bandwidth waster always runs on the CPUs unless a specific action is taken to turn off, or stop, the bandwidth waster. Data are gathered from the CPUs, including time of operation of any bandwidth waster, and the gathered data are used to compute a bill for operation of the computer system.

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