Capping layer in interconnect system and method for bonding the

Details Capping layer in interconnect system and method for bonding the Capping layer in interconnect system and method for bonding the

1996-06-28

1999-01-26

Bowers, Jr., Charles L.

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438622, 438624, 438619, 438455, 438456, 438457, 438438, 438355, 438977, 438916, 148DIG12, H01L 2144, H01L 21443

Patent

active

058638326

ABSTRACT:
The present invention provides an interconnect system. The interconnect system includes a substrate, a first dielectric layer deposited upon the substrate. The interconnect system further includes at least two electrically conductive interconnect lines formed upon the first dielectric layer. Each of the at least two interconnect lines have a top surface and side surfaces. Adjacent side surfaces of two adjacent interconnect lines define therebetween a space that has a dielectric constant substantially equal to 1. A dielectric film is bonded upon the top surface of the at least two interconnect lines. The dielectric film substantially prevents obstruction of the space by further process.

REFERENCES:
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patent: 5289035 (1994-02-01), Bost et al.
patent: 5289337 (1994-02-01), Aghazadeh et al.
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patent: 5476817 (1995-12-01), Numata
patent: 5624868 (1997-04-01), Iyer
patent: 5690749 (1997-11-01), Lee
Yoshio Homma et al., Using Selective CMP with Low Permittivity Organic SOG to Achieve Low Capacitance Multilevel Interconnection Jun. 27-29, 1995 VMIC Conference 1995 ISMIC--104/95/0457.

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