Capacitor-related systems for addressing package/motherboard...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Bump leads

Reexamination Certificate

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C257S780000, C438S613000

Reexamination Certificate

active

06992387

ABSTRACT:
According to some embodiments, a device includes a first conductive plane electrically coupled to a first terminal associated with a first polarity and a second terminal associated with the first polarity, a second conductive plane electrically coupled to a third terminal associated with a second polarity, and a dielectric disposed between the first conductive plane and the second conductive plane. A first capacitance is present between the first terminal and the third terminal, a second capacitance is present between the second terminal and the third terminal, and the first capacitance and the second capacitance may be substantially dissimilar.

REFERENCES:
patent: 5929627 (1999-07-01), MacPherson et al.
patent: 6369443 (2002-04-01), Baba
patent: 6762498 (2004-07-01), Morrison et al.
patent: 6803659 (2004-10-01), Suwa et al.
patent: 2003/0034855 (2003-02-01), Wallace, Jr. et al.
patent: 0 506 122 (1992-09-01), None
patent: 0 506 122 (1992-09-01), None
“PCT International Searching Authority”, dated Dec. 3, 2004 for PCTUS2004/018091, 5pgs.

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