Capacitor for semiconductor integrated devices

Details Capacitor for semiconductor integrated devices Capacitor for semiconductor integrated devices

2006-05-23

2006-05-23

Tran, Minhloan (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S296000, C257S300000, C257S303000, C257S306000

Reexamination Certificate

active

07049646

ABSTRACT:
A memory cell of a stacked type is formed by a MOS transistor and a ferroelectric capacitor. The MOS transistor is formed in an active region of a substrate of semiconductor material and comprises a conductive region. The ferroelectric capacitor is formed on top of the active region and comprises a first and a second electrodes separated by a ferroelectric region. A contact region connects the conductive region of the MOS transistor to the first electrode of the ferroelectric capacitor. The ferroelectric capacitor has a non-planar structure, formed by a horizontal portion and two side portions extending transversely to, and in direct electrical contact with, the horizontal portion.

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Robert E. Jones, Jr., “Integration of Ferroelectric Nonvolatile Memories”, Process Integration, Solid State Technology, Oct. 1997, pp. 201-208.

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