Electronic digital logic circuitry – Interface – Logic level shifting
Reexamination Certificate
2007-04-05
2008-10-28
Tran, Anh Q (Department: 2819)
Electronic digital logic circuitry
Interface
Logic level shifting
C326S080000, C326S081000
Reexamination Certificate
active
07443200
ABSTRACT:
A circuit architecture, or topology, that provides a level shifter which is substantially independent of the duty cycle of an input signal includes an H-bridge arrangement of field effect transistors, a pair of capacitively coupled inputs terminals connected to the gates of the high-side (i.e., connected to the positive power supply) transistors and a pair of voltage dividers to set the bias voltage at the gates of the high-side transistors, wherein one side of each voltage divider is coupled to the power supply node and the other side of each voltage divider is cross-coupled to the output node of the opposite side of the H- bridge.
REFERENCES:
patent: 5175512 (1992-12-01), Self
Lee Wai L.
Quinn Patrick A.
Avnera Corporation
Tran Anh Q
Werner Raymond J.
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