Static information storage and retrieval – Read/write circuit – Differential sensing
Reexamination Certificate
2006-01-27
2009-06-30
Nguyen, VanThu (Department: 2824)
Static information storage and retrieval
Read/write circuit
Differential sensing
C365S206000, C365S208000, C365S214000, C327S050000, C327S051000, C330S250000, C330S252000
Reexamination Certificate
active
07554867
ABSTRACT:
A memory cell for storing a charge that gives rise to a cell voltage representing a bit value, the memory cell being capable of having the cell voltage boosted to a boost value at a time following reading of the stored charge. The memory cell includes a first capacitor connected between a first node and ground. A second capacitor is connected between a second node and ground, and a first switch is connected between the first node and the second node. A second switch and a third capacitor are connected in series between the first node and the second node, with a terminal of the second switch being connected to the first node, the common connection node of the second switch and the third capacitor comprising a third node. A third switch is connected between the third node and ground. In operation, in a first storage phase the first and third switches are closed and the second switch is open. In a second storage phase the first and third switches are open and the second switch is closed, resulting in the cell voltage being boosted to the boost value.
REFERENCES:
patent: 4858193 (1989-08-01), Furutani et al.
patent: 5031143 (1991-07-01), Jaffe
patent: 5844265 (1998-12-01), Mead et al.
Rainer, Kraus, et al., “A Sense-Signal Doubling Circuit for DRAMs,”IEEE International Solid-State Circuits Conference, Feb. 25, 1987, 3 pages.
Brady III Wade J.
Nguyen Van-Thu
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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