Static information storage and retrieval – Systems using particular element – Magnetoresistive
Reexamination Certificate
2003-05-14
2004-11-09
Phan, Trong (Department: 2818)
Static information storage and retrieval
Systems using particular element
Magnetoresistive
C365S205000, C365S207000
Reexamination Certificate
active
06816403
ABSTRACT:
BACKGROUND OF INVENTION
The present invention relates generally to magnetic memory devices and, more particularly, to a capacitively coupled sensing apparatus and method for cross point magnetic random access memory (MRAM) devices.
Magnetic (or magneto-resistive) random access memory (MRAM) is a promising technology in the development of non-volatile random access memory that could begin to replace the existing dynamic random access memory (DRAM) as the standard memory for computing devices. The use of MRAM as a non-volatile RAM will eventually allow for “instant on” systems that come to life as soon as the system is turned on, thus saving the amount of time needed for a conventional PC, for example, to transfer boot data from a hard disk drive to volatile DRAM during system power up.
A magnetic memory element (also referred to as a tunneling magneto-resistive, or TMR device) includes a structure having ferromagnetic layers separated by a non-magnetic layer, and arranged into a magnetic tunnel junction (MTJ). Digital information is stored and represented in the memory element as directions of magnetization vectors in the magnetic layers. More specifically, magnetic vectors in one magnetic layer (also referred to as a reference layer) are magnetically fixed or pinned, while the magnetization direction of the other magnetic layer (also referred to as a “free” layer) may be switched between the same direction and the opposite direction with respect the fixed magnetization direction of the reference layer. The magnetization directions of the free layer are also known “parallel” and “antiparallel” states, wherein a parallel state refers to the same magnetic alignment of the free and reference layers, while an antiparallel state refers to opposing magnetic alignments therebetween.
Depending upon the magnetic state of the free layer (parallel or antiparallel), the magnetic memory element exhibits two different resistances in response to a vertically applied current with respect to the TMR device. The particular resistance of the TMR device thus reflects the magnetization state of the free layer, wherein resistance is “low” when the magnetization is parallel, and “high” when the magnetization is antiparallel. Accordingly, a detection of changes in resistance allows an MRAM device to provide information stored in the magnetic memory element (i.e., a read operation). In addition, an MRAM cell is written to through the application of a bi-directional current in a particular direction, in order to magnetically align the free layer in a parallel or antiparallel state.
However, one difficulty with the practical operation of a cross-point MRAM array relates to the sensing of a particular cell, given that each cell in the array is coupled to the other cells through several parallel leakage paths. The resistance seen at one cross point equals the resistance of the memory cell at that cross point in parallel with resistances of memory cells in the other rows and columns. If the memory cell being sensed has a different resistance due to the stored magnetization, a small differential voltage may develop. This small differential voltage in turn can give rise to a parasitic current, which is typically much larger than the sense current, and thus can obscure the sensing of the sense current and hence the resistance of the cell. As a result, complex auto-zeroing techniques have been implemented in conventional sensing schemes to subtract out the error voltage or the error current. Moreover, because the selected bit line voltage is controlled by a feedback amplifier, the stable operation thereof requires a compensation capacitance, which results in a slower read access time.
SUMMARY OF INVENTION
The foregoing discussed drawbacks and deficiencies of the prior art are overcome or alleviated by a sensing apparatus for a cross point magnetic random access memory (MRAM) device. In an exemplary embodiment, a sense amplifier is selectively coupled to a selected bitline, the selected bitline being in communication with a selected MRAM cell to be read, and the selected MRAM cell further in communication with a selected wordline associated therewith. A reference current source is coupled to the selected bitline. The sense amplifier is configured to receive as an input thereto a signal voltage generated on said selected bitline, the signal voltage being generated in response to a reference current supplied by the reference current source and a read current applied through the selected MRAM cell. The sense amplifier is further configured to provide an offset corrected, amplified output reflective of the data state of the selected MRAM cell.
In another aspect, a method for sensing data stored within a cross point magnetic random access memory (MRAM) device includes establishing an offset voltage of a sense amplifier, the sense amplifier selectively coupled to a selected bitline within the MRAM device, the selected bitline being in communication with an MRAM cell to be read. A read current is applied through the MRAM cell to be read, and a reference current is applied through the selected bitline. A signal voltage is sensed on the selected bitline, the signal voltage being generated in response to the read current and the reference current. The signal voltage is coupled to an input of the sense amplifier, wherein the sense amplifier provides an offset corrected output reflective of the data state of the MRAM cell.
In still another aspect, a method for sensing data stored within a cross point magnetic random access memory (MRAM) device includes coupling a sense amplifier to a selected bitline, the selected bitline being associated with a plurality of MRAM cells defined at intersections of the selected bitline and a plurality of wordlines. A shorting device within said sense amplifier is activated and deactivated so as to store a DC offset value associated with the sense amplifier. The plurality of wordlines and at least one reference wordline are initially biased at an equalization voltage, and the voltage on a selected one of the plurality of wordlines is altered from the equalization voltage, thereby causing a read current to flow through a selected MRAM cell. The voltage on the at least one reference wordline is also altered from the equalization voltage, thereby causing a reference current to flow through the selected bitline. A signal voltage developed on the bitline is amplified, the signal voltage having a polarity reflective of the data state of selected MRAM cell, wherein the amplified signal voltage is offset corrected by the sense amplifier.
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Brennan Ciaran J.
DeBrosse John K.
Houghton Russell J.
Cantor & Colburn LLP
Pepper Margaret A.
Phan Trong
LandOfFree
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