Capacitive high voltage generator

Electric power conversion systems – Current conversion – With voltage multiplication means

Reexamination Certificate

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Details

C307S109000, C307S110000

Reexamination Certificate

active

06631081

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a capacitive high voltage generator.
2. Description of the Related Art
As is known, capacitive high voltage generators of the prior art exploit the many stages of which they are composed to supply voltages at outputs which are higher than the supply voltage.
For simplicity's sake,
FIG. 1
shows a capacitive single stage high voltage generator
50
. The single stage
1
of the voltage generator
50
has an input terminal
2
receiving a timing signal CK and an output terminal
3
supplying an output voltage V
0
.
Stage
1
comprises a buffer
4
, of an inverting type, a boost capacitor
5
, a first and a second diode
6
,
7
, and a filter capacitor
8
. In detail, the buffer
4
has a first terminal
9
connected to a first supply line
10
set at a first reference potential V
1
, a second terminal
11
connected to a ground terminal GND and an input terminal connected to an input terminal
2
of the stage
1
. The boost capacitor
5
has a first terminal connected to an output terminal
12
of the buffer
4
and a second terminal connected to an intermediate node
13
. The first diode
6
has an anode terminal
14
connected to a second supply line
15
set at a second potential V
2
and a cathode terminal connected to the intermediate node
13
. The second diode
7
has an anode terminal connected to the intermediate node
13
and a cathode terminal connected to the output terminal
3
of the stage
1
. The filter capacitor
8
has a first terminal connected to the output terminal
3
and a second terminal connected to the ground terminal GND.
When a higher output voltage is required, the high voltage generator
50
comprises several stages cascade-connected and structurally the same as stage
1
in FIG.
1
. In particular, in the example shown in
FIG. 2
, the high voltage generator
50
comprises a first and a second stage
1
a
,
1
b
, the second stage
1
b
having the anode terminal
14
b
, of the corresponding first diode
6
b
, directly connected to the output terminal
3
a
of the first stage
1
a
.
If the high voltage generator
50
is formed by n stages and the first potential V
1
is the same as the second potential V
2
, the output voltage V
0
is equal to:
V
0
=(
n+
1)
V
1
−2
nV
D
where V
D
is the voltage present across each diode.
As it possesses a silicon technology that is able to support high voltages, the high voltage generator
50
may be advantageously realized as shown in
FIG. 3
in which each stage
1
a
,
1
b
has the anode terminal
14
a
,
14
b
of the corresponding first diode
6
a
,
6
b
and the first terminal
9
a
,
9
b
of the corresponding buffer
4
a
,
4
b
set at the same reference potential.
In this case the output voltage V
0
is equal to:
V
0
=2
n
V
1
+(2−2
n+1
)
V
D
However, the high voltage generators of the prior art are poorly efficient when they are supplied with voltages of a few Volts (for example 1.8V) which are imposed by the use of more and more advanced submicrometric technologies.
BRIEF SUMMARY OF THE INVENTION
The aim of the present invention is to provide a capacitive high voltage generator having greater efficiency than that which may be obtained with capacitive high voltage generators of the prior art and able to supply high output voltages even when starting from initial voltages of only a few Volts.
In one embodiment, the invention resides in a capacitive high voltage generator operable in response to input timing signals and connectable to first and second supply inputs and a reference potential. The generator includes first, second and third charging circuits. Each charging circuit has a control element, a switch element and a boost capacitor. The control element of the first and second charging circuits are configured to alternatively connect the boost capacitor thereof to the first supply input and to the reference potential in response to one of the input timing signals. The switch element is connected to the boost capacitor of each charging circuit with the junction thereof forming an output terminal of the charging circuit. The switch element of the first and second charging circuits is connected to the second supply input. The control element of the third charging circuit is configured to alternatively connect the boost capacitor thereof to the output terminal of the first charging circuit and to the reference potential in response to one of the input timing signals. The switch element of the third charging circuit is connected to the output terminal of the second charging circuit. The output of the third charging circuit is the output of the combination of the first, second and third charging circuits.
In this embodiment, the switch element of each of the first, second and third charging circuits may be a diode. Alternatively, the switch element of each of the first, second and third charging circuits may be a MOS transistor. Or, the switch element of the first, second and third charging circuits may perform a synchronous rectification. The control element of each of the first, second and third charging circuits may be an inverting buffer.
In one illustrated embodiment, each of the first, second and third charging circuits is configured for connection to first and second supply inputs and a reference potential. Each charging circuit includes a buffer element, a switch element and a boost capacitor. The boost capacitor has first and second terminals. The switch element has first and second terminals. The buffer element has a timing input to receive the input timing signal or the negative thereof, a first terminal, a second terminal connected to the reference potential, and an output connected to the first terminal of the boost capacitor. The charging circuit is configured to alternatively connect the first terminal of the boost capacitor to the first supply input and to the reference potential in response to the input timing signal. The second terminal of the switch element is connected to the second terminal of the boost capacitor with the junction thereof forming an output terminal of the charging circuit. The first terminal of the buffer element of the first and second charging circuits is connected to the first supply input. The first terminal of the switch elements of the first and second charging circuits is connected to the second supply input. The first terminal of the buffer element of the third charging circuit is connected to the output terminal of the first charging circuit. The first terminal of the switch element of the third charging circuit is connected to the output terminal of the second charging circuit. The output terminal of the third charging circuit is configured as the output of the combination of the first, second and third charging circuits.
Other features and advantages of the invention will become apparent from the following detailed description, taken in conjunction with the accompanying drawings.
According to the present invention a capacitive high voltage generator is provided.


REFERENCES:
patent: 4581546 (1986-04-01), Allan
patent: 4733108 (1988-03-01), Truong
patent: 5023465 (1991-06-01), Douglas et al.
patent: 5081371 (1992-01-01), Wong
patent: 6288601 (2001-09-01), Tomishima

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