Semiconductor device manufacturing: process – With measuring or testing
Reexamination Certificate
2001-11-14
2003-10-14
Zarabian, Amir (Department: 2822)
Semiconductor device manufacturing: process
With measuring or testing
C438S476000, C438S471000, C438S928000, C438S974000
Reexamination Certificate
active
06632688
ABSTRACT:
TECHNICAL FIELD
The present invention relates to semiconductor processing, and more particularly to measuring impurity concentrations in process gases used to manufacture wafers in epitaxial reactors.
BACKGROUND OF THE INVENTION
Manufacturers of semiconductor integrated circuits are constantly striving to increase the performance and reduce the price of their products. One way to both increase the performance and reduce the price of an integrated circuit is to reduce the size of the integrated circuit. By reducing the size of a circuit, more circuits can be manufactured on a single semiconductor substrate, thereby reducing the unit cost of the circuit. In addition, reducing the size of a circuit typically increases its speed and reduces its power consumption.
One problem manufacturers encounter in attempting to reduce the size of their integrated circuits involves impurity contamination. For example, metallic contamination of a semiconductor substrate can cause excess leakage currents, poor voltage breakdown characteristics, and reduced minority carrier lifetimes. As the size of an integrated circuit decreases, the detrimental effect of impurities in the semiconductor is magnified. For extremely small circuits, even relatively low levels of contamination can be sufficient to render the circuit inoperative. Therefore, manufacturers take extraordinary measures to prevent impurity contamination in their manufacturing processes.
To optimize their contamination control practices, manufacturers often need to measure the concentration of impurities in their semiconductor substrates at various points during the manufacturing process. This allows manufacturers to determine which area(s) of their process are causing impurity contamination problems. However, as the levels of impurity concentration have decreased to very low levels, it has become more and more difficult to measure the impurity concentration. Indeed, semiconductor industry standards such as the National Semiconductor Roadmap call for impurity concentrations to be as low as 10
10
cm
−3
in the near future. Since the atomic density of a typical semiconductor substrate such as silicon is approximately 10
22
cm
−3
, impurity concentrations of 10
10
cm
−3
can be very difficult to measure even with sophisticated measurement equipment.
For example, copper (Cu) and nickel (Ni) are two metallic impurities found in semiconductor substrates. Impurity concentrations of copper and nickel in heavily boron-doped substrates typically are measured by techniques such as Total Reflection X-Ray Fluorescence (TXRF) and Secondary Ion Mass Spectroscopy (SIMS), etc. The minimum detection limit of copper is approximately 10
17
cm
−3
by TXRF (measured near the surface of the substrate) and approximately 10
15
cm
−3
by SIMS. As a result, manufacturers have begun to search for new ways to measure impurity concentrations in semiconductor substrates.
As acceptable levels of metallic impurities are continually being reduced and new methods for measuring impurity concentrations are developed, manufacturers must understand and control the impurity concentrations of processes used to manufacture semiconductor substrates.
One such area of concern is the gas mixture used in epitaxial deposition. During epitaxial deposition, the entire front of the semiconductor substrate is in contact with the epitaxial process gases used for epitaxial deposition. Since the epitaxial deposition step is performed at relatively high temperatures of approximately 1000° C. or higher, any contaminants contained within the gas mixture can be deposited onto the semiconductor wafer, which is very undesirable. It is therefore very important to use gases that have low concentrations of impurities. Unfortunately, no reliable method currently exists to determine the concentration of metallic impurities in the various gases used at such low levels. There is a need, therefore, for a reliable method of determining and monitoring the contamination levels of source gases used in epitaxial deposition to support and assist in circuit size reduction.
SUMMARY OF THE INVENTION
The invention provides a method for evaluating the concentration of impurities in epitaxial process gases by measuring the concentrations of impurities of a semiconductor wafer on which an epitaxial layer has been deposited. The method includes running an epitaxial cycle with a monitor wafer having contamination levels below detection limits placed in an epitaxial reactor, and running an epitaxial deposition cycle. At least a portion of the contaminants that have been deposited on the semiconductor wafer from the epitaxial process gases to the monitor wafer are drawn together and measured.
In one embodiment of the invention, a gettering layer is formed on the surface of the epitaxial deposition layer to getter impurities that have been deposited from the epitaxial process gases. The impurity concentration of the gettering layer is then measured and the results are used to determine at least a range of impurity concentrations contained within the epitaxial process gases.
REFERENCES:
patent: 5233191 (1993-08-01), Noguchi et al.
patent: 6174740 (2001-01-01), Ohta et al.
patent: 08-340008 (1996-12-01), None
patent: 10-223713 (1998-08-01), None
Anderson Douglas G.
Novacek Christy
SEH America Inc.
Zarabian Amir
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