Capacitance modeling

Details Capacitance modeling Capacitance modeling

2007-12-11

2007-12-11

Chiang, Jack (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000, C438S018000

Reexamination Certificate

active

11153047

ABSTRACT:
A method of modeling capacitance for all practical 2D on-chip wire structures including coplanar and microstrip structures. The method includes using a field lines approach (600) to obtain capacitance expressions for structure components, combining the expressions (704) for components of the subject structure and obtaining a capacitance expression (705) for the subject structure. The static capacitance matrix for the structure is calculated from the capacitance expression. The structure components can include components with parallel plate field lines, quarter circle field lines, singularity field lines, singularity field lines with restriction, double set of quarter circle field lines which are used as building blocks for the subject structure. The final capacitance expressions can be used for the modeling of critical on-chip wires and devices as well as inside a capacitance extraction tool.

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