Capacitance measurement circuit

Details Capacitance measurement circuit Capacitance measurement circuit

2007-06-12

2007-06-12

Hirshfeld, Andrew H. (Department: 2858)

Electricity: measuring and testing

Impedance, admittance or other quantities representative of...

Lumped type parameters

C324S679000, C324S663000

Reexamination Certificate

active

10760449

ABSTRACT:
A CBCM circuit is capable of separately measuring each component of a measuring target capacitance. A node (N1) is electrically connected to a terminal (P2) between the drains of PMOS and NMOS transistors (MP2, MN2). As a target capacitance forming part, a coupling capacitance (Cc) is formed between the node (N1) and a node (N2). The node (N2) is connected to a pad (58) through the terminal (P2) and an NMOS transistor (MN3), and a node (N3) is connected to a terminal (P3) between the drains of PMOS and NMOS transistors (MP1, MN1). A reference capacitance (Cref) is formed at the node (N3) as a dummy capacitance. Currents (Ir, It) supplied from a power source to the nodes (N3, N1) are measured with current meters (61, 62), respectively and a current (Im) induced from the node (N2) and flowing to a ground level is measured with a current meter (63).

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