Calibration of read/write memory access via advanced memory...

Details Calibration of read/write memory access via advanced memory... Calibration of read/write memory access via advanced memory...

2011-01-04

2011-01-04

Ellis, Kevin L (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

C327S157000, C327S161000, C365S189070, C365S194000, C702S072000, C702S079000, C702S089000, C702S106000

Reexamination Certificate

active

07865660

ABSTRACT:
Methods and apparatuses to calibrate read/write memory accesses through data buses of different lengths via advanced memory buffers. One embodiment includes an advanced memory buffer (AMB) having: a plurality of ports to interface respectively with a plurality of data buses; a port to interface with a common clock bus for the plurality of data buses; and an adjustable circuit coupled with the plurality of ports to level delays on the plurality of data buses. In one embodiment, the data buses have different wire lengths between the dynamic random access memory (DRAM) memory chips and the advanced memory buffer (AMB).

REFERENCES:
patent: 5703489 (1997-12-01), Kuroe
patent: 6390579 (2002-05-01), Roylance et al.
patent: 6738918 (2004-05-01), Toda
patent: 7668679 (2010-02-01), Best
patent: 2003/0041224 (2003-02-01), Toda
patent: 2006/0259666 (2006-11-01), Lee
patent: 2007/0097264 (2007-05-01), Risk et al.
patent: 2008/0098142 (2008-04-01), Fujimoto
JEDEC standard JESD79-3 (proposed), “DDR3 SDRAM Specification” , Dated Oct. 6, 2006.
JEDEC standard JESD82-20, “FB-DIMM: Advanced Memory Buffer (AMB)” , Dated Mar. 2007.
JEDEC standard JESD206, “FB-DIMM architecture and protocol” , Dated Jan. 2007.

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