Data processing: measuring – calibrating – or testing – Calibration or correction system – Timing
Reexamination Certificate
2007-05-18
2009-06-02
Nghiem, Michael P (Department: 2863)
Data processing: measuring, calibrating, or testing
Calibration or correction system
Timing
C702S079000, C702S080000
Reexamination Certificate
active
07542862
ABSTRACT:
A method and system for calibration of multi-metric sensitive delay measurement circuits provides for reduction of process-dependent variation in delays and their sensitivities to circuit metrics. A process corner for the delay circuit(s) is determined from at least one delay measurement for which the variation of delay due to process variation is previously characterized. The delay measurement(s) is made at a known temperature(s), power supply voltage(s) and known values of any other environmental metric which the delay circuit is designed to measure. Coefficients for delay versus circuit metrics are then determined from the established process corner, so that computation of circuit metric values from the delay measurements have improved accuracy and reduced variation due to the circuit-to-circuit and/or die-to-die process variation of the delay circuits.
REFERENCES:
patent: 5638418 (1997-06-01), Douglass et al.
patent: 6631503 (2003-10-01), Hsu et al.
patent: 6769100 (2004-07-01), Acar et al.
patent: 2006/0273831 (2006-12-01), Macksimovic et al.
patent: 2007/0132493 (2007-06-01), Fujisawa et al.
patent: 2007/0257714 (2007-11-01), Cheung
patent: 2008/0126010 (2008-05-01), Cranford et al.
patent: 2008/0288196 (2008-11-01), Singh et al.
Nonvolatile Memory, Britannica Online Encyclopedia, retrieved Sep. 5, 2008.
Chen, et al., “A Time-to-Digital-Converter-Based CMOS Smart Temperature Sensor”, IEEE, JSSC, vol. 40, No. 8, Aug. 2005.
Dudek, et al., “A High Resolution CMOS Time-to-Digital Converter Utilizing a Vernier-Based Delay Line”, IEEE Trans. on Solid-State Circuits, vol. 35, No. 2, Feb. 2000.
Restle, et al., “Timing Uncertainty Measurements on the Power5 Microprocessor”, 2004 IEEE ISSC Conference, Jun. 2004.
Office Action in U.S. Appl. No. 11/750,385 dated Sep. 10, 2008.
Drake Alan J.
Gebara Fadi H.
Keane John P.
Schaub Jeremy D.
Senger Robert M.
Harris Andrew M.
International Business Machines - Corporation
Mitch Harris Atty at Law, LLC
Nghiem Michael P
Salys Casimer K.
LandOfFree
Calibration of multi-metric sensitive delay measurement... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Calibration of multi-metric sensitive delay measurement..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Calibration of multi-metric sensitive delay measurement... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4112540