Calibration circuit, semiconductor device including the...

Details Calibration circuit, semiconductor device including the... Calibration circuit, semiconductor device including the...

2011-08-09

2011-08-09

Le, Don P (Department: 2819)

Electronic digital logic circuitry

Signal sensitivity or transmission integrity

Bus or line termination

C326S087000

Reexamination Certificate

active

07994812

ABSTRACT:
A semiconductor device adjusting an impedance level of an output buffer, includes a replica buffer circuit including a circuit configuration substantially identical to the output buffer, a counter circuit changing an impedance code to vary an impedance level of the replica buffer, a latch circuit temporarily holding the impedance code in response to a control signal, and an end-determining circuit producing the control signal in response to a lapse of a predetermined period from issuance of a calibration command, irrespective of a fact that the replica buffer has not yet reached a desirable impedance level.

REFERENCES:
patent: 6762620 (2004-07-01), Jang et al.
patent: 7221193 (2007-05-01), Wang et al.
patent: 2008/0001624 (2008-01-01), Lee
patent: 2008/0112246 (2008-05-01), Mei
patent: 2002-152032 (2002-05-01), None
patent: 2004-032070 (2004-01-01), None
patent: 2005-159702 (2005-06-01), None
patent: 2006-203405 (2006-08-01), None
patent: 2007-110615 (2007-04-01), None

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