Calibrated methods of forming hemispherical grained silicon laye

Details Calibrated methods of forming hemispherical grained silicon laye Calibrated methods of forming hemispherical grained silicon laye

1998-01-14

2000-09-12

Whitehead, Jr., Carl

Semiconductor device manufacturing: process

With measuring or testing

438398, 438665, G01R 3126

Patent

active

061176923

ABSTRACT:
A method of forming a silicon layer includes the step of calibrating the heater temperature so that a predetermined temperature is maintained when a microelectronic substrate is subsequently heated despite a number of processing runs previously performed. This calibrating step includes loading a test substrate into the reaction chamber, subjecting the test substrate to the predetermined reaction recipe wherein the test substrate is heated according to the predetermined recipe, measuring the temperature of the substrate, and removing the test substrate from the reaction chamber. The heater temperature is then adjusted according to the measured temperature of the test substrate. A microelectronic substrate is then loaded into the reaction chamber, and a hemispherical grained silicon seed layer is formed on the microelectronic substrate according to the predetermined recipe. The hemispherical grained silicon seed layer is annealed to form a hemispherical grained silicon layer according to the predetermined recipe.

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