Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2007-04-17
2007-04-17
Dinh, Paul (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
Reexamination Certificate
active
10955189
ABSTRACT:
One embodiment of the present invention provides a system that calculates etch proximity-correction during an OPC (Optical Proximity Correction) process. During operation, the system receives a layout for an integrated circuit. Next, the system selects a target point on an edge in the layout. The system then casts a plurality of rays from the target point, and constructs a plurality of pie-wedges based on the cast rays. The system then computes a surface integral of a statistical function over the pie-wedges, wherein the surface integral of the statistical function models the etch bias at the target point. Next, the calculated etch proximity-correction is applied to an area in proximity to the target point.
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Beale Dan
Shiely Jim
Stirniman John
Dinh Paul
Parihar Suchin
Park Vaughan & Fleming LLP
Synopsys Inc.
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