Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2007-11-27
2007-11-27
Nguyen, Hiep T. (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
Reexamination Certificate
active
10993579
ABSTRACT:
In general, in one aspect, the disclosure describes a method that includes providing a memory access instruction of a processing element's instruction set including multiple parameters. The parameters include at least one address and a token specifying whether the instruction should cause data retrieved from memory in response to the memory access instruction to be unavailable to a subsequent memory access instruction via a cache
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patent: 2003/0041216 (2003-02-01), Rosenbluth et al.
patent: 2004/0024821 (2004-02-01), Hady
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Cabot Mason B.
Hady Frank T.
Rosenbluth Mark B.
Tennenhouse David L.
Grossman Tucker Perreault & Pfleger PLLC
Intel Corporation
Nguyen Hiep T.
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