Cached reads for a storage system

Details Cached reads for a storage system Cached reads for a storage system

2007-10-16

2010-10-05

Bragdon, Reginald G (Department: 2189)

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

C711S137000, C711SE12022, C711SE12017

Reexamination Certificate

active

07809883

ABSTRACT:
Embodiments of the invention may improve read operations for fully cached workloads on storage systems with limited processing or CPU-cache resources. Some embodiments employ an indicator such as a counter to indicate when the use of readahead analysis steps, such as resource, intensive predictive processing, is undesirable. In these embodiments, the counter is incremented for each buffer cache read that is successfully performed without the need for a disk input/output operation. When the counter variable exceeds a threshold such as, for example, a maximum readahead size, then the system advantageously foregoes predictive processing steps of the readahead analysis phase, and further foregoes a readahead execution phase. The foregoing results in a net performance benefit for the system based on a reduced likelihood of a need for an input/output operation, and further, based on a reduced likelihood of a need for predictive processing relating to readahead analysis and/or execution.

REFERENCES:
patent: 6282614 (2001-08-01), Musoll
patent: 2004/0022094 (2004-02-01), Radhakrishnan et al.
patent: 2005/0154825 (2005-07-01), Fair
patent: 2007/0220208 (2007-09-01), Nomura et al.
U.S. Appl. No. 10/753,608, filed Jan. 8, 2004, Fair.
U.S. Appl. No. 10/721,596, filed Dec. 25, 2003, Fair.

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