Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
2011-05-03
2011-05-03
Nguyen, Hiep T (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
Reexamination Certificate
active
07937524
ABSTRACT:
An apparatus, as well as systems, methods, and articles can operate to record the address of write operations to a memory cached by a non-volatile cache prior to executing an operating system cache driver. In an embodiment, a non-volatile cache may be implemented by creating a device option read only memory (ROM), or modifying the associated computer basic input-output system (BIOS) to trap software interrupts associated with disk and other media access requests. Associated addresses, such as logical block addresses, can be stored in a log for data that is modified. The resulting log can be stored in a non-volatile medium, including the cache itself. If the available log space is not large enough to record all write activity prior to loading operating system drivers, a flag may be set to indicate the overrun condition.
REFERENCES:
patent: 5359713 (1994-10-01), Moran et al.
patent: 5603331 (1997-02-01), Heemels et al.
patent: 5732238 (1998-03-01), Sarkozy
patent: 5937433 (1999-08-01), Lee et al.
patent: 6148368 (2000-11-01), DeKoning
patent: 6446141 (2002-09-01), Nolan et al.
patent: 6629198 (2003-09-01), Howard et al.
patent: 6640278 (2003-10-01), Nolan et al.
patent: 7299379 (2007-11-01), Royer et al.
patent: 2004/0268026 (2004-12-01), Royer, Jr. et al.
patent: WO-2005006196 (2005-01-01), None
patent: WO-2005006196 (2005-01-01), None
“Chinese Application Serial No. 200480014334.9, Office Action Received mailed May 30, 2008”.
“U.S. Appl. No. 10/607,772 Final Office Action mailed Apr. 11, 2007”, 10 pgs.
“U.S. Appl. No. 10/607,772 Final Office Action mailed Nov. 21, 2005”, 19 pgs.
“U.S. Appl. No. 10/607,772 Non-Final Office Action mailed Jun. 14, 2006”, 10 pgs.
“U.S. Appl. No. 10/607,772 Non-Final Office Action mailed Aug. 4, 2005”, 16 pgs.
“U.S. Appl. No. 10/607,772 Non-Final Office Action mailed Oct. 18, 2006”, 9 pgs.
“U.S. Appl. No. 10/607,772 Notice of Allowance mailed Jul. 5, 2007”, 6 pgs.
“U.S. Appl. No. 10/607,772 Response filed Jan. 18, 2007 in response to Non-Final Office Action mailed Oct. 18, 2006”, 11 pgs.
“U.S. Appl. No. 10/607,772 Response filed Jan. 23, 2006 in response to Final Office Action mailed Nov. 21, 2005”, 66 pgs.
“U.S. Appl. No. 10/607,772 Response filed Mar. 17, 2006 in response to Final Office Action mailed Nov. 21, 2005”, 11 pgs.
“U.S. Appl. No. 10/607,772 Response filed Jun. 11, 2007 in response to Final Office Action mailed Apr. 11, 2007”, 8 pgs.
“U.S. Appl. No. 10/607,772 Response filed Aug. 8, 2006 in response to Non-Final Office Action mailed Jun. 14, 2006”, 12 pgs.
“U.S. Appl. No. 10/607,772 Response filed Sep. 30, 2005 to Non-Final Office Action mailed Aug. 4, 2005”, 17 pgs.
Handy, J.,The Cache Memory Book, Academic Press, 2nd Edition, p. xv, (1998).
Kozierok, C., “PC Guide”,Logical Block Addressing,, http://www.pcguide.com/ref/hdd/bios/modesLBA-c.html,(Apr. 17, 2001).
Kozierok, C., “PC Guide”,BIOS Functions and Operation, http://www.pcguide.com/ref/mbsys/bios/func.html,(Apr. 17, 2001).
Coulson Richard L.
Royer, Jr. Robert J.
Intel Corporation
Nguyen Hiep T
Schwegman Lundberg & Woessner, P.A.
LandOfFree
Cache write integrity logging does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Cache write integrity logging, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Cache write integrity logging will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2669769