Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2005-09-27
2005-09-27
Padmanabhan, Mano (Department: 2189)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S134000
Reexamination Certificate
active
06950904
ABSTRACT:
A cache way replacement technique to identify and replace a least-recently used cache way. A cache way replacement technique in which a least-recently used cache way is identified and replaced, such that the replacement of cache ways over time is substantially evenly distributed among a set of cache ways in a cache memory. A least-recently used cache way is identified in a cache memory having a non-binary number of cache ways.
REFERENCES:
patent: 5325511 (1994-06-01), Collins et al.
patent: 5845320 (1998-12-01), Pawlowski
patent: 2002/0042887 (2002-04-01), Chauvel et al.
Burgess Bradley G.
Erdner Todd D.
Hanson Heather L.
Inoa Midys
Intel Corporation
Metzger Erik M.
Padmanabhan Mano
LandOfFree
Cache way replacement technique does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Cache way replacement technique, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Cache way replacement technique will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3446760