Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2005-01-04
2005-01-04
Kim, Hong (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S120000, C711S144000, C711S145000, C711S141000, C711S156000, C711S168000
Reexamination Certificate
active
06839806
ABSTRACT:
A cache system comprising a cache tag buffer270for storing a part of a cache tag memory260. When a memory processing request is issued from a processor10, a cache control means280retrieves both of the cache tag memory260and the cache tag buffer270. If a target cache block is present in the cache tag buffer270, then, without waiting for a retrieval result of the cache tag memory260, the cache control circuit280accesses the cache data memory250using information of the cache block.
REFERENCES:
patent: 5619673 (1997-04-01), Wang
patent: 5978886 (1999-11-01), Moncton et al.
patent: 6026476 (2000-02-01), Rosen
patent: 6226763 (2001-05-01), Fu et al.
patent: 6266752 (2001-07-01), Witt et al.
patent: 6401175 (2002-06-01), Tremblay et al.
patent: 6412059 (2002-06-01), Matsuyama
patent: 6636906 (2003-10-01), Sharma et al.
patent: 20040044848 (2004-03-01), Katayama
patent: A 9-293060 (1997-11-01), None
Akashi Hideya
Koyanagi Masaru
Murakami Yoshiki
Antonelli Terry Stout & Kraus LLP
Hitachi , Ltd.
Kim Hong
LandOfFree
Cache system with a cache tag memory and a cache tag buffer does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Cache system with a cache tag memory and a cache tag buffer, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Cache system with a cache tag memory and a cache tag buffer will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3416988