Cache system with a cache tag memory and a cache tag buffer

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories

Reexamination Certificate

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Details

C711S120000, C711S144000, C711S145000, C711S141000, C711S156000, C711S168000

Reexamination Certificate

active

06839806

ABSTRACT:
A cache system comprising a cache tag buffer270for storing a part of a cache tag memory260. When a memory processing request is issued from a processor10, a cache control means280retrieves both of the cache tag memory260and the cache tag buffer270. If a target cache block is present in the cache tag buffer270, then, without waiting for a retrieval result of the cache tag memory260, the cache control circuit280accesses the cache data memory250using information of the cache block.

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patent: 6636906 (2003-10-01), Sharma et al.
patent: 20040044848 (2004-03-01), Katayama
patent: A 9-293060 (1997-11-01), None

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