Cache system and method for controlling the cache system...

Details Cache system and method for controlling the cache system... Cache system and method for controlling the cache system...

2006-05-16

2006-05-16

Ellis, Kevin L. (Department: 2188)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

Reexamination Certificate

active

07047362

ABSTRACT:
A method is provided for controlling a cache system. The cache system to be controlled comprises a direct-mapped cache configured with a small block size, and a fully associative spatial buffer configured with a large block, which includes a plurality of small blocks. Where accesses to the direct-mapped cache and the fully associative buffer are misses, data of a missed address and data of adjacent addresses are copied to the large block in the fully associative spatial buffer according to a first-in-first-out (FIFO) process. Furthermore, if one or more small data blocks is accessed among its corresponding large block of data which is to be expelled from the fully associative buffer, the small block(s) accessed is copied to the direct-mapped cache.

REFERENCES:
patent: 6397296 (2002-05-01), Werner
patent: 6460115 (2002-10-01), Kahle et al.
patent: 6609177 (2003-08-01), Schlumberger et al.

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