Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2007-07-26
2008-10-14
Peugh, Brian R (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S171000, C711S173000
Reexamination Certificate
active
07437514
ABSTRACT:
A cache system is provided which includes a cache memory and a cache refill mechanism which allocates one or more of a set of cache partitions in the cache memory to an item in dependence on the address of the item in main memory. This is achieved in one of the described embodiments by including with the address of an item a set of partition selector bits which allow a partition mask to be generated to identify into which cache partition the item may be loaded.
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May David
Sturges Andrew C.
Jorgenson Lisa K.
Morris James H.
Peugh Brian R
STMicroelectronics Limited
Wolf Greenfield & Sacks P.C.
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