Cache residence prediction

Details Cache residence prediction Cache residence prediction

2007-09-04

2007-09-04

McLean-Mayo, Kimberly (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S141000, C711S145000, C711S144000

Reexamination Certificate

active

10779999

ABSTRACT:
The present invention proposes a novel cache residence prediction mechanism that predicts whether requested data of a cache miss can be found in another cache. The memory controller can use the prediction result to determine if it should immediately initiate a memory access, or initiate no memory access until a cache snoop response shows that the requested data cannot be supplied by a cache.The cache residence prediction mechanism can be implemented at the cache side, the memory side, or both. A cache-side prediction mechanism can predict that data requested by a cache miss can be found in another cache if the cache miss address matches an address tag of a cache line in the requesting cache and the cache line is in an invalid state. A memory-side prediction mechanism can make effective prediction based on observed memory and cache operations that are recorded in a prediction table.

REFERENCES:
patent: 2002/0144063 (2002-10-01), Peir et al.

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