Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2005-07-26
2005-07-26
Moazzami, Nasser (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C712S207000
Reexamination Certificate
active
06922753
ABSTRACT:
Method and apparatus for prefetching cache with requested data are described. A processor initiates a read access to main memory for data which is not in the main memory. After the requested data is brought into the main memory, but before the read access is reinitiated, the requested data is prefetched from main memory into the cache subsystem of the processor which will later reinitiate the read access.
REFERENCES:
patent: 5787478 (1998-07-01), Hicks et al.
patent: 5802567 (1998-09-01), Liu et al.
patent: 5872972 (1999-02-01), Boland et al.
patent: 6119218 (2000-09-01), Arora et al.
patent: 6134710 (2000-10-01), Levine et al.
patent: 6473832 (2002-10-01), Ramagopal et al.
patent: 6757787 (2004-06-01), Shen et al.
Brown Jeffrey D.
Irish John D.
Kunkel Steven R.
International Business Machines - Corporation
Moazzami Nasser
Moser Patterson & Sheridan LLP
LandOfFree
Cache prefetching does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Cache prefetching, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Cache prefetching will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3426589