Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent
1996-07-15
2000-03-07
Bragdon, Reginald G.
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
711113, 711137, 711136, G06F 1208
Patent
active
060353759
ABSTRACT:
A cache management system and method monitors and controls the contents of cache memory coupled to at least one host and at least one data storage device. A cache indexer maintains a current index of data elements which are stored in cache memory. A sequential data access indicator, responsive to the cache index and to a user selectable sequential data access threshold, determines that a sequential data access is in progress for a given process and provides an indication of the same. The system and method allocate a micro-cache memory to any process performing a sequential data access. In response to the indication of a sequential data access in progress and to a user selectable maximum number of data elements to be prefetched, a data retrieval requestor requests retrieval of up to the selected maximum number of data elements from a data storage device. A user selectable number of sequential data elements determines when previously used micro-cache memory locations will be overwritten. A method of dynamically monitoring and adjusting cache management parameters is also presented.
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Alterescu Bruno
Castel Daniel
Vishlitzky Natan
Yanai Moshe
Bragdon Reginald G.
EMC Corporation
Fitzgerald, Esq Leanne J
Gun ther, Esq. John M.
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