Cache memory system including a cache memory employing a tag...

Details Cache memory system including a cache memory employing a tag... Cache memory system including a cache memory employing a tag...

2006-11-07

2006-11-07

Padmanabhan, Mano (Department: 2188)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

Reexamination Certificate

active

07133975

ABSTRACT:
A cache memory system including a cache memory employing a tag including associated touch bits. The system includes a first cache memory subsystem having a first cache storage and a second cache memory subsystem including a second cache storage. The first cache storage may store a first plurality of cache lines of data. The second cache storage may store a second plurality of cache lines of data. Further the second cache memory subsystem includes a tag storage which may store a plurality of tags each corresponding to a respective cache line of the second plurality of cache lines. In addition, each of said plurality of tags includes an associated bit indicative of whether a copy of the corresponding respective cache line is stored within the first cache memory subsystem.

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patent: PCT/KR01/00793 (2001-05-01), None

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